It therefore seems that if the external impedance were appreciably different from that figure, the circuit length limits would be appreciable different for VD and disconnection considerations. Am I wrong?
No, you aren't wrong, although people don't [CYA](usually)[/CYA] worry about the external L-N loop impedance, figuring that if Ze is OK then that will be too. It'd be the same for TN-C-S supplies anyway, and for TN-S and TT it would be the same as it would be if the supply were converted to TN-C-S. PFC is established to make sure that the current won't be
too much over the "at least" value, but that's it.